This disclosure relates generally to the field of semiconductor device fabrication, and more particularly to a sealed shallow trench isolation (STI) region for a semiconductor device.
Integrated circuits (ICs) may include a large number of devices, such as complementary metal oxide semiconductor (CMOS) field effect transistors (FETs), formed on a chip. Production of smaller, higher performance devices is important to enhance performance and improve reliability of ICs. As devices are scaled down, the technology required to produce such devices becomes more complex. Various regions in a FET, such as source/drain regions, may be formed by epitaxial deposition to provide a relatively high performance device. Epitaxy refers to the deposition of a crystalline overlayer on a crystalline substrate, where the overlayer is in registry with the substrate. The overlayer is called an epitaxial film or epitaxial layer. It is desired that the deposited material form a crystalline overlayer that has one well-defined orientation with respect to the substrate crystal structure. Epitaxial films may be grown from gaseous or liquid precursors, and may comprise materials such as embedded silicon germanium (eSiGe).
Epitaxial deposition may require formation of a recess, in which the material is subsequently deposited, in the substrate. The recess may be formed by reactive ion etching (RIE). Additionally, there may be a precleaning step before deposition. The precleaning step may comprise using hydrofluoric (HF) acid. The formation of the recess and precleaning step may cause removal of material from the device that is undesired, and may cause issues during subsequent semiconductor processing steps such as contact formation. For example, a divot may be formed in a shallow trench isolation (STI) region of the device during precleaning. The presence of divot may cause faceting in material that is subsequently epitaxially deposited on or near the STI region. Faceting may reduce to total volume of the deposited material, which may cause, for example, an epitaxially deposited source/drain region to have insufficient height to make good contact with the electrical contacts to the device.